So, a glimmer of progress in the saga that is my final year project!

( progress! )

It works, with a 'testing' XOR core. The bottom dump is the key xor the second dump. Yay! That's running in FPGA via pcie.
The project is, looking at my original Gantt chart, around three weeks behind schedule, mainly because I had a bit of a nightmare (well, a lot of a nightmare) grappling with the Xilinx PCI-Express core. Once I got it running - about a week ago - everything else was fairly straightforward. I'm hoping I can make up for lost time over Christmas (which should be do-able, because I built so much 'spare time' in to my schedule, anticipating this kind of catastrophe) and get everything done on time.

Also troubling me is that all my Uni stuff this semester is due on the same day, and there's some impressive juggling going on between my VR group project (to model a chunk of the Univeristy in Second Life) and another module, in which I am required to model some stuff in a formal Finite-State language.

Most of the VR stuff is done now. My part of the project is to interface the 3D environment to the Uni's web-based 'learning environment', Blackboard. Blackboard, however, doesn't kick out any nice webservices, so there's a lot of screen-scraping and generally horrible code going on in there. All of that's now done, though, so I just need to finish it off by writing some scripts in Second Life to make everything feel immersive. Watch this space.